SGLS Satellite Modems & Ranging Systems – RF IF & Sub-Carrier

Model RNG201 SGLS Ranging Processor PCI Card
Model RNG201

The RNG201 is a high performance, multiple format, Ranging Processor. Both forward link range code generation and return link range processing functions are accommodated. The RNG201 is unique in eight major ways. 1) It processes major ranging formats: SGLS, USB, ESA and Commercial. 2) It is programmable to select SGLS code rates and USB / ESA Major Tone frequencies. 3) It is programmable for SGLS, USB and ESA code lengths. 4) Doppler and Range estimates are included in the process. 5) Adjustable acquisition and tracking bandwidths enhance operation in low signal-to-noise applications. 6) A tunable, high dynamic range, high selectivity front end is incorporated to minimize adjacent signal interference and ranging signal distortion. 7) An all-digital design improves accuracy, stability and resolution. 8) Reconfigurable logic allows for modifications to accommodate unique customer needs.

The RNG201 generates the forward link ranging signal using digital processing and an NCO clocked by a high rate oscillator locked to an external frequency reference. The digital signal is passed to a D/A, smoothing filter and output signal conditioner to create the Ranging Output for transmission to the satellite. The return link Ranging Input is passed through input signal conditioning and a tunable anti-alias filter to minimize noise and interference. The signal is then digitized and digitally filtered to reduce noise and interference. A digital Phase Lock Loop (PLL) is used to acquire and track the phase of the Major Tone (SGLS Clock). A frequency search is performed over an adjustable range at an adjustable rate. Acquisition is assisted by a Doppler frequency offset estimate, if available. Once acquired, the phase of the received signal is compared to the phase of the transmitted signal. The phase comparison provides a high-resolution measure of the time delay between the transmitted and received signal. After the Major Tone is acquired, the Minor Tones and Code Components are sequentially acquired to resolve range ambiguity. Ambiguity Resolution is assisted by a Range estimate, if available. If lock is lost, the acquisition process can be automatically reinitiated using the last Major Tone frequency and Range measurement as an aid. Different bandwidths may be set for the acquisition mode versus the tracking mode. These settings can be automatically set based on the measured signal-to-noise ratio. In the tracking mode, a 3rd order PLL is used to prevent acceleration errors from developing.

Outputs from the Ranging Processor include: the measured Range, acquisition status, tracking status, signal quality and alarm conditions. This information is provided by way of the PCI Bus. A self-test feature internally loops-back the Ranging Output to the Ranging Input for calibration and operation verification. All status and control is via the PCI Bus. All I/O is via the card front panel. The PCI Bus is fully compliant with PCI Local Bus Specification Revision 2.2.

  1. Selectable Format: SGLS, USB, ESA or Commercial
  2. SGLS:
  3.      • Selectable Code Length: Long (818,000 km), Medium (91,000 km) and Short (11,000 km)
         • Tunable Code Rate: 100 kbps to 1 Mbps
  4. USB:
  5.      • Selectable Major Tones: High (500 kHz), Medium (100 kHz) and Narrow (20 kHz)
         • Selectable Ambiguity Resolution Code: Long (958,000 km), Medium (119,000 km) and Short
           (15,000 km)
  6. Enhanced Acquisition through Doppler and Range Acquisition Aids
  7. Adjustable Acquisition and Tracking Bandwidths for Performance Optimization
  8. High Selectivity, Tunable Anti-Aliasing Filter Minimizes Interference and Distortion
  9. All Digital Processing Provides High Resolution, Stability and Accuracy
  10. Flexible, Reconfigurable-Logic Design Allows Modification for Unique Requirements

Reference Input
5 MHz or 10 MHz, selectable
Sinusoid or square wave
0 dBm +/- 3 dB, TTL/50 ohms or EIA-485/EIA-422A, selectable

Timing Input
One pulse per second (pps) input or internal, selectable
Pulse Width:
1 microsecond
TTL, or EIA-485/EIA-422A

Range Output Word
32 Bit word updated on rising edge of Timing Reference

Status Words
Overload, Loss, Signal Present, Acquisition Status, PLL Lock, Code Lock, Reference Lock, Range Word Valid, Acquisition Odd/Even Bit, Input Power, Signal Power, Phase Error, Frequency Offset, Reference Alarm, Strobe Alarm

Unambiguous Range (SGLS)
Long Code=
Medium Code=
Short Code=
(1MHz Code Rate)

Range Resolution (SGLS)
Long Code=
Medium Code=
Short Code=
Limited by 32 Bit Range Output Word

Range Accuracy (SGLS)
RMS noise error:

Acquisition Time (unaided) (SGLS)
Long Code
<60 sec
Short Code
<2 sec
(1Mbps Code Rate)

Self Test
Internal loop back

PCI Interface
32 Bit, 33 MHz Target Interface
Status & Control